Umklamo Wenethiwekhi Yokusabalalisa Amandla e-PCB

Inethiwekhi yokusabalalisa amandla (i-PDN) iyingqalasizinda eletha i-voltage ezinzile kuyo yonke i-IC ebhodini lakho. Ukuklama i-PDN egcina i-target impedance kusuka ku-DC kuya kumakhulu amaningana e-MHz kudinga indlela ehlelekile yokukhetha i-VRM, ubukhulu be-capacitor, kanye ne-plane geometry — okungekho nokukodwa okungenziwa nge-intuition yodwa.

Okuqukethwe

1. Izakhiwo ze-PDN kanye nezifunda ezivame ukwenzeka
2. Ukubalwa kwe-Target Impedance
3. Ukukhethwa kwe-VRM kanye nosayizi we-Bulk Capacitor
4. I-Plane Capacitance kanye ne-PDN Simulation
5. Ukulinganiswa kwe-PDN, Ukuqinisekiswa kanye ne-FAQ

Lo mhlahlandlela uhlanganisa inqubo ephelele yokuklama inethiwekhi yokusatshalaliswa kwamandla e-PCB — kusukela ekuchazeni imigomo ye-impedance ngokukhetha i-VRM, usayizi we-capacitor, ukulingisa, kanye nokuqinisekiswa kwangemva kokwenziwa. Ukuze uthole uhlaka olubanzi lobuqotho bamandla okuhlanganisa ukubekwa kokuhlukaniswa kanye nomklamo wendiza, bheka umhlahlandlela oyinhloko wokuklama ubuqotho bamandla e-PCB.

1. Izifunda Zokwakhiwa Kwezakhiwo Nezikhathi Ze-PDN

I-PDN ephelele ihlanganisa izizinda eziningi zomzimba, ngayinye inegalelo ekungeneni, ukumelana, kanye nomthamo ku-impedance iyonke. Ukuqonda okubalulekile ukuthi ayikho ingxenye eyodwa noma isici sokuklama esilawula i-impedance kulo lonke uhla lwemvamisa. Isizinda ngasinye sinobubanzi bemvamisa obuhlukile lapho sibusa khona, futhi ngasinye sidinga ukunakwa komklamo okuzimele.

Imfuneko ye-bandwidth ye-PDN isethwa yi-current esheshayo umthwalo ongayikhiqiza:

f_max = 0.5 / t_bavuke
Kweprosesa enesikhathi sokukhuphuka samanje esingu-1 ns: f_max = 500 MHz.
Ku-DDR5 ku-6400 MT/s ngama-edge rate angu-100 ps: f_max inwebeka ku-5 GHz, edinga ukuphathwa ngokucophelela kwephakheji kanye nomthamo we-die capacitance.

Umgomo womklamo ukugcina i-Z < Z _target ngokuqhubekayo kusukela ku-DC kuya ku-f _max . Noma yiliphi igebe lemvamisa lapho i-PDN impedance idlula i-Z _target liwumthombo ongaba khona wokwehla kwamandla kagesi, ukujiya, noma ukwehluleka kwe-logic ku-switching frequency ehambisanayo.

2. Ukubalwa kwe-Target Impedance

I-Target impedance yiyona ndlela ebaluleke kakhulu yokuklama i-PDN. Iguqula ukubekezelelana kwe-voltage ripple kube yisabelomali se-quantitative impedance okumele saneliswe yisinqumo ngasinye sokukhetha izingxenye kanye nesakhiwo.

Z_umgomo = (V_supply × i-ripple%) / I_ukuphakama
V_supply: i-voltage yokunikezwa okujwayelekile | i-ripple%: ingxenye enkulu ye-ripple evunyelwe | I_ukuphakama: umugqa wamanje osheshayo ophezulu ovela kudatha ye-IC

Lezi zinombolo zibonisa ububanzi obukhulu bezimfuneko ze-PDN. Isitimela esiyinhloko se-GPU ku-0.1 mΩ sidinga i-PDN ecishe ibe ephelele — yonke i-milliohm ye-parasitic inductance ku-PCB stackup, i-VRM output impedance, noma nge-array inethonya elilinganisekayo. Ukuthola lezi zinhloso ngaphambi kokuqala ukwakheka kuvimbela ukuphindaphinda okubizayo.

I _{-peak ye-I} ivela kudatha ye-IC njenge-maximum supply current, i-peak operating current, noma njenge-transient current waveforms esigabeni sohlelo lokusebenza. Kuma-FPGA nama-processor, amathuluzi okulinganisa amandla omthengisi (i-Xilinx Power Estimator, i-Intel VID) anikeza amanani anembe kakhulu kune-maximum yedatha ye-datasheet. Uma kungekho inani elitholakalayo, kala i-VRM output current current probe ohlelweni olusebenzayo bese wengeza imajini engu-20–30% yokusebenza okubi kakhulu.

3. Ukukhethwa kwe-VRM kanye nosayizi we-Bulk Capacitor

I-VRM ibusa impedance ye-PDN kusuka ku-DC kuya ku-bandwidth yayo ye-feedback loop. Ngaphansi kwe-bandwidth ye-loop, i-VRM ilawula ngenkuthalo umphumela, iveza impedance yebanga le-milliohm. Ku-crossover frequency, impedance ifinyelela phezulu — lokhu kuyinguquko ebaluleke kakhulu okufanele iphathwe. Ngaphezulu kwe-bandwidth ye-loop, impedance yokukhipha ye-VRM iyakhuphuka futhi ama-capacitor amakhulu athatha izintambo.

Ama-rails anomoya ophezulu ngaphezu kuka-20–30 A adinga ukucushwa kwe-VRM yesigaba esiningi. Izigaba eziningi zihlukanisa imijikelezo yazo yokushintsha, zinciphisa i-ripple yamanje yokukhipha ngesici esilingana nenani lezigaba, zivumela ama-inductor amancane okukhipha, futhi zisabalalise umthwalo wokushisa kumadivayisi amaningi wamandla. Kuma-PCB asheshise i-AI adinga izinsiza ezingu-200+ A, imiklamo ye-VRM yesigaba esingu-8–16 ijwayelekile.

Usayizi We-Bulk Capacitor

Ama-capacitor amakhulu ahlanganisa igebe le-impedance phakathi kwe-bandwidth ye-loop ye-VRM kanye nobubanzi bemvamisa lapho ukuhlukanisa i-ceramic kuthatha khona izintambo. Umthamo omncane we-bulk capacitance wokuvimbela i-impedance ukuthi ikhuphuke ngaphezu kwe-Z _target ku-VRM crossover yilokhu:

C_bulk = 1 / (2π × f_crossover × Z_umgomo)
Isibonelo: Z_umgomo = 5 mΩ, f_crossover = 200 kHz → C_bulk = 159 µF okungenani

Kumadizayini edijithali asheshayo, ama-array amakhulu e-MLCC ayathandwa ngenxa yokuhlanganiswa kwawo kwe-ESR ephansi, i-ESL ephansi, kanye ne-capacitance ezinzile uma kuqhathaniswa nemvamisa kanye nokushisa. I-array efanayo yamanani amaningi e-MLCC - isibonelo, i-100 µF eyodwa ehambisana ne-10 µF eziningana - inikeza i-bandwidth ebanzi ephumelelayo yokuhlukanisa kune-capacitor eyodwa enkulu yanoma yiliphi inani lodwa.

4. I-Plane Capacitance kanye ne-PDN Simulation

Izindiza zethusi ze-PCB zibonisa amandla asakazekile phakathi kwamandla aseduze kanye nezindiza zomhlabathi. Lokhu mandla ezindiza kusebenza ngaphezu kwe-100 MHz — lapho ama-capacitor ahlukene esephenduke inductive futhi engasafaki isandla ekuhlukaniseni i-PDN.

C_indiza = e₀ × ε_r × A / d
ε₀ = 8.854 × 10⁻¹² F/m | ε_r = 4.3 (FR-4) | A = indawo yendiza ehambisanayo (m²) | d = ukujiya kwe-dielectric (m)
Isibonelo: ibhodi elingu-100×100 mm, i-4 mil FR-4 phakathi kwezindiza ze-GND ne-PWR → C_indiza ≈ 3.8 nF

Nakuba i-3.8 nF incane ngokwezinga eliphelele, isatshalaliswa ngokulinganayo kuyo yonke indawo yebhodi futhi iveza i-inductance ephansi kakhulu kumaza aphezulu. Ukuze wandise umthamo wendiza: sebenzisa i-prepreg engu-3–4 mil phakathi kwezindiza ze-GND ne-PWR (hhayi i-10+ mil core); wandise indawo yethusi ehambisanayo futhi ugweme ukusikwa kwendiza okungadingekile; futhi ucabangele izinto ze-capacitance ezifakwe nge-high-ε _r (njenge-Sanmina C-Ply) zamabhodi ane-Z _target engaphansi kwe-5 mΩ ngaphezu kwe-100 MHz — lezi zinto zingandisa umthamo wendiza ngo-100× ngaphezu kwe-FR-4 ejwayelekile.

Izindlela Zokulingisa ze-PDN

Ukulingisa kwe-PDN kuqinisekisa ukuthi inethiwekhi eklanyelwe ifinyelela ukuvimba okuqondiwe ngaphambi kokwenziwa. Izindlela ezintathu zisetshenziswa ekusebenzeni, ngokulandelana okwandayo kokunemba:

• Imodeli ehlanganisiwe esekelwe kuspredishithi: Ihlukanisa amamodeli e-PDN njengamanethiwekhi e-RLC achungechunge. Ishesha futhi ihlonza izinkinga ezinkulu zokuklama, kodwa iphuthelwa ukuzwakala kwendiza kanye nemiphumela yendawo. Kungcono kakhulu ekukhetheni i-VRM yokuqala kanye nokulinganisa inani le-bulk capacitor.
• Ukulingisa kwe-PDN yepharamitha ye-S (I-Ansys SIwave, i-Cadence Sigrity, i-HyperLynx PI): Ukulingisa okugcwele kwe-EM kwezindiza ze-PCB. Kuthwebula iziqongo ze-resonance yendiza, ama-null okulwa ne-resonance, umphumela wokuqhekeka kwendiza, kanye nokwenza ngcono ukufakwa kwe-capacitor. Kuyadingeka uma i-Z_umgomo ingaphansi kwe-10 mΩ.
• Ukulingisa isizinda sesikhathi: Isebenzisa amaphrofayili wamanje e-IC angokoqobo avela kumamodeli wamandla e-IBIS noma ama-waveform alinganisiwe. Inikeza izibikezelo zokwehla kwamandla kagesi ngqo ngaphansi kwezimo zangempela zokushintsha. Indlela enembile kakhulu yokuhlaziya ukusayina okubi kakhulu.

5. Ukulinganiswa kwe-PDN, Ukuqinisekiswa kanye ne-FAQ

Ngemva kokwenziwa kwe-PCB, qinisekisa i-PDN impedance ngaphambi kokuhlanganiswa kwesistimu ephelele ukuqinisekisa ukuthi imiphumela yokulingisa iyatholakala kuhadiwe. Ukungafani phakathi kokulingisa nokulinganisa kuvame ukuvela kumamodeli ezingxenye anganembile, i-inductance engalinganisiwe yama-parasitic kuma-via noma izixhumi, noma ama-resonance endiza ashintshwe yizakhiwo zangempela ze-dielectric.

Ukulinganiswa kwe-VNA ye-Port eyodwa

Kala i-S11 endaweni yephini yamandla e-IC ene-VRM kanye nama-capacitor ahlukanisayo agcwele, i-IC isusiwe. I-S11 iguqulwa ibe yi-impedance:

Z = Z₀ × (1 + S11) / (1 − S11)
Z₀ = 50 Ω (i-VNA port impedance). Ku-Z < 100 mΩ, sebenzisa ukulinganisa kwe-shunt-through enamachweba amabili ukuze uthole ukunemba okuthuthukisiwe kumanani aphansi e-impedance.

Ukuqinisekiswa Kwesizinda Sesikhathi

Uma uhlelo luhlanganiswe ngokugcwele, sebenzisa i-power rail probe (ubuncane be-bandwidth engu-20 MHz, kukhethwa i-1 GHz) ku-IC power pin ngaphansi komthwalo ogcwele wokusebenza. Qinisekisa: i-peak-to-peak voltage ripple ingaphakathi kwesabelomali se-ripple esivunyelwe; akukho kwehla kwesikhashana okudlula ukucaciswa kwe-voltage yokusebenza okuncane; futhi imvamisa ye-ripple yokulawula eshintshayo iyabonakala futhi ingaphakathi kwe-amplitude elindelekile.

imibuzo ejwayelekile ukubuzwa

Yini ebangela i-anti-resonance peak ku-PDN impedance?

I-anti-resonance peak yenzeka lapho i-impedance yohlobo olulodwa lwe-capacitor (eba yi-inductive ngaphezu kwe-SRF yayo) ihlangana ne-impedance yohlobo olulandelayo lwe-capacitor (esasebenza kahle). Ama-Impedance anezela esikhundleni sokukhansela kule ndawo yokuhlangana, adala i-peak engadlula i-Z _target . Yicindezele ngokusebenzisa ama-capacitor anamanani ahlukene kancane ukusabalalisa imvamisa ye-resonance, engeza ama-capacitor okunciphisa amandla okumelana ngokulingana, noma ukukhetha izinhlobo zama-capacitor ezine-ESR ephezulu ku-crossover frequency.

Ngingasebenzisa yini ubuhlalu be-ferrite ukuze ngihlukanise izingxenye ze-PDN?

Ama-Ferrite bead afanele ukuhlukanisa ama-analog noma ama-RF rails azwelayo emsindweni wokushintshana kwedijithali ongaphezu kuka-10–100 MHz. Ungasebenzisi ama-ferrite beads alandelanayo anezindlela zokunikezwa kwedijithali zamandla aphezulu - ukuvinjelwa kwawo kubangela ukwehla okukhulu kwe-voltage ngaphansi komthwalo, futhi ukuziphatha okungekho emgqeni kungabangela ukungazinzi kwe-VRM.

Zingaki izigaba ze-VRM engizidingayo?

Isiqondiso esijwayelekile singu-10–15 A ngesigaba ngasinye semiklamo ejwayelekile ye-FET VRM ehlanganisiwe. Ku-60 A CPU rail, sebenzisa izigaba ezingu-4–6. Ku-GPU noma i-AI accelerator rails ku-200 A+, izigaba ezingu-12–16 zivamile. Izigaba eziningi zinciphisa i-output ripple, zivumela ama-inductor amancane, futhi zithuthukise i-transient response bandwidth ngezindleko zomlawuli omkhulu kanye ne-FET count.

Ukuze uthole izihloko ezihlobene nobuqotho bamandla, bheka iziqondiso zethu mayelana nokubekwa kwe-capacitor , amasu okuklama indiza yamandla , ukunciphisa umsindo wokushintsha ngesikhathi esisodwa, kanye nomklamo we-PCB stackup onezingqimba eziningi . I-Highleap Electronics inikeza ukubuyekezwa komklamo we-PDN kanye nokwakhiwa kwe-PCB okusheshayo. Cela ikhotheshini yephrojekthi yakho.